Jobbörse
Finde Jobs in deiner Nähe – ob vor Ort, hybrid oder remote.- Ähnliche Jobs zu: Senior ASIC Design Engineer, Hardware Compute Group
Senior ASIC Design Engineer
BTA Design ServicesOttawaAbout Us: Headquartered in Ottawa, BTA Design serves the electronic design community from Canada, specializing in ASIC and FPGA design and verification, and embedded software development services. We
ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team
AmazonUnited StatesASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team Utility Computing (UC) provides product innovations — from foundational services such as Amazon’s Simple Storage Service (S3) and A
Director of Engineering for ML hardware design & Architecture
QualcommUnited StatesCompany: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > Video Systems, HW Architecture General Summary The Machine Learning Hardware Accelerator team is seeking an experi
Lead IC Design Engineer San Francisco, CA Hardware
Foundation Robotics LabUnited StatesOur mission is to create advanced robots that can operate in complex environments, reducing human risk in conflict zones and enhancing efficiency in labor-intensive industries.We are on the lookout fo
Principal/Senior Staff/Staff CPU Design Engineer
SQL Pager LLCUnited StatesPrincipal/Senior Staff/Staff ASIC Design Engineer (RISC-V) Client Overview Client is building the first latency optimized SoC for their industry. Using its proven AI accelerator designs, Client is tar
ASIC Design Verification Engineer I (Full Time) - United States
Cisco SystemsUnited StatesPlease note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a Cisco representative may contact you di
Senior Physical Design Engineer(7051)
TSMC - Taiwan Semiconductor Manufacturing Company LimitedUnited StatesAs a Senior Physical Design Engineer, you will be responsible for the physical design implementation PnR run, Performance/Power/Area (PPA) comparison, congestion & DRC analysis, and design optimizatio