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Über
Senior RTL Design Engineer , you will play a pivotal role in developing Intel’s next‑generation microprocessors, contributing to groundbreaking technologies that drive innovation across industries. You will collaborate with a world‑class team to define and implement cutting‑edge CPU architecture and microarchitecture features. Your expertise will ensure that Intel delivers high‑performance and power‑efficient CPU designs that power diverse devices—from personal computers to data center solutions—and will significantly impact Intel’s product success and mission to shape the future of technology.
Key Responsibilities
Collaborate on the definition, design, and implementation of CPU architecture and microarchitecture features.
Develop logic design, RTL coding, and simulation for CPU components, including cell libraries, functional units, and CPU IP blocks for full‑chip integration.
Optimize logic designs to meet power, performance, area, and timing goals while ensuring design integrity for physical implementation.
Review verification plans and implementations, resolving issues and applying corrective measures to ensure feature correctness in RTL tests.
Document microarchitectural specifications (MAS) for the CPU features you design.
Work closely with architecture, backend, and other design teams to deliver industry‑leading CPU products.
Provide technical leadership by advancing methodologies and contributing to innovative solutions that enhance design efficiency and scalability.
Support SoC customers to ensure seamless integration and high‑quality CPU blocks.
Behavioral Traits
Strong communication and problem‑solving skills.
Lead teams in a fast‑paced and collaborative environment.
Qualifications Minimum Qualifications and Experience:
Bachelor’s degree in Electrical/Computer Engineering, Computer Science, or related field with 9+ years of relevant experience, or a Master’s degree in the same field with 7+ years of experience.
7+ years of experience in RTL design using Verilog or System Verilog, with strong knowledge of hardware modeling and logic debug environments.
7+ years of experience in modern energy‑efficient and low‑power logic design methods, including techniques applicable to high‑frequency optimization.
4+ years of experience in cross‑clock domain crossings and power‑aware design.
4+ years of experience in scripting languages such as TCL, Perl, or Python.
Preferred Qualifications and Experience:
Knowledge of CPU power‑management (power/electrical budgeting, dynamic voltage and frequency scaling, thermal, P/C states, and reset sequence handling).
Comprehensive knowledge of Intel Architecture ISA and system architecture, including x86 assembly language.
Experience with high‑speed circuit design and optimization, specifically for datapath, circuits, and arrays.
Familiarity with circuit planning and timing convergence processes.
Ability to leverage broad understanding of CPU architecture to deliver impactful solutions.
Proficiency with static timing analysis, UPF, and lint checks.
Job Type Experienced Hire
Shift Shift 1 (United States of America)
Primary Location US, Texas, Austin
Additional Locations US, Arizona, Phoenix
Business Group Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry‑leading products today while also defining the next generation of computing experiences.
Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range: $190,610.00 – $269,100.00 USD (US locations).
Work Model for this Role This role will be eligible for our hybrid work model, allowing employees to split their time between working on‑site at their assigned Intel site and off‑site. Job posting details (such as work model, location or time type) are subject to change.
Additional Information Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
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Sprachkenntnisse
- English
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