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Über
number one requirement
is
real-world FPGA development experience . Emphasis is on
HDL design work , not FPGA integration only. Key Technical Focus
FPGA Development
Must have
hands-on HDL development experience VHDL or Verilog
(both are used at Caterpillar) Full FPGA development lifecycle:
HDL design Simulation Synthesis Debugging
Candidates must have
personally written HDL code , not just:
Interfaced with an FPGA designed by someone else Worked only on the microcontroller side talking to an FPGA
Additional Technical Expectations
Low-level embedded software exposure is a plus , including:
Peripheral interfacing Memory access BSP / driver-level development
Version control
Git is used for version management
Debug skills
Experience using debug equipment such as:
Oscilloscopes Hardware debug tools
Strong ability to troubleshoot when designs don't work as expected
Experience Level Discussion
Preferred experience : ~5+ years Typical Day / Week
This is a
pure development role , not leadership Activities include:
Gathering functional and technical requirements Creating and reviewing designs Implementing designs in HDL Simulation and testing Debugging Merging work with other engineers Releasing code and starting the next development cycle
Sprachkenntnisse
- English
Hinweis für Nutzer
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