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THE MEMORY SUBSYSTEM team at AMD is hiring a Senior Member of Technical Staff (SMTS) Verification Engineer to contribute to the definition, design, and verification of high-speed LPDDR/DDR memory subsystem solutions and associated IP.
To be considered for an interview, please make sure your application is full in line with the job specs as found below.
In this role, you will lead verification efforts across multiple product lines, working at both IP and subsystem levels, and participate in pre-silicon, production-level firmware co-verification using hybrid co-simulation environments and Universal Verification Methodology (UVM).
THE PERSONAs an SMTS Verification Engineer, you will own and drive verification strategy and execution for memory subsystem components and associated IP.
You will design and implement advanced verification environments using SystemVerilog and UVM, develop and maintain robust testbenches and co-verification frameworks, and collaborate with architecture, design, firmware, and validation teams across multiple geographic locations.
Key Responsibilities- Architect, develop, and maintain UVM-based verification environments for memory subsystems and associated IP
- Lead verification at IP and subsystem levels, including test planning, coverage definition, and execution
- Develop and debug co-verification environments integrating production-level firmware with hardware simulation
- Integrate, bring up, and debug Memory VIP, transactors, monitors, and checkers
- Analyze and close functional and code coverage, and manage regressions
- Collaborate with globally distributed teams and mentor engineers on best practices
- Strong fundamental and foundational knowledge and application of Object-Oriented Programming
- Strong proficiency in SystemVerilog, UVM, and C/C++
- Experience with IP and subsystem verification using industry-standard simulators (e.g., VCS)
- Background in testbench architecture and firmware/hardware co-verification
- Proficiency with Python, shell scripting, Git, and/or Perforce
- Verification experience with DDR/JEDEC standard IP, DDR PHY, or memory controllers
- Experience with assertions (SVA/OVL), SystemC, and Zebu emulation
- End-to-end verification experience from front-end development through lab bring-up
- Ability to technically mentor other engineers
Bachelor’s or Master’s degree (or equivalent) in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience in verification engineering.
LOCATIONIreland (Dublin or other AMD Ireland locations; hybrid working supported).
Employment is contingent on meeting applicable export control and security requirements.
AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. xcfaprz This posting is for an existing vacancy.
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Sprachkenntnisse
- English
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