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Memory Design Application EngineerIntelUnited States
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Memory Design Application Engineer

Intel
  • US
    United States
  • US
    United States

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Job Details:
Job Description:
About Intel Foundry Services
Intel Foundry is a systems foundry dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. With a focus on scalability, AI advancement, and shaping the future, we provide an unparalleled blend of an industry-leading technology, a rich IP portfolio, a world-class design ecosystem, and an operationally resilient global manufacturing supply chain.
Position Overview
The Aerospace, Defense & Government (ADG) Memory Design Application Engineer provides specialized technical support to Intel Foundry Services customers on memory compiler generation and integration challenges. This critical role ensures successful customer tape-outs by resolving complex memory IP integration issues, driving quality improvements in memory collaterals, and delivering comprehensive technical guidance on memory design methodologies for advanced semiconductor applications.
Key Responsibilities
Memory IP Technical Support & Integration
Provide comprehensive technical support to Intel Foundry Services customers on memory compiler generation and integration issues
Collaborate with internal Intel teams and external stakeholders including foundry customers' design teams, Memory IP providers, and EDA vendors on foundational IP integration issue resolution
Drive resolution of customer issues related to memory IP collaterals, ensuring seamless integration and optimal performance
Technical Content Development & Training
Create application notes, comprehensive documentation, and deliver technical training presentations to customers and internal teams
Drive quality improvements in design kits, Memory IP collaterals, and documentation to remove barriers to successful customer design tape-outs
Develop best practice guidelines for memory integration across advanced process technologies and customer applications
Memory Design Methodology & Problem Solving
Lead debugging and problem-solving activities in collaborative team environments
Provide technical expertise on memory compiler design, generation, and optimization
Support customers through complex memory design challenges and advanced integration requirements
Drive methodology improvements to enhance memory design productivity and reliability
Customer Engagement & Technical Excellence
Deliver customer-facing technical support with focus on memory design and integration solutions
Ensure maximum customer satisfaction through expert guidance on memory IP implementation
Support aerospace, defense, and government customers with specialized memory requirements and security considerations
Core Competencies
Self-driven and results-oriented with capability to effectively manage multiple complex tasks
Effective communicator with strong interpersonal and leadership capabilities, fostering collaboration across cross-functional teams and providing constructive feedback
Qualifications:
The Minimum qualifications are required to be considered for this position. Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates
Minimum Qualifications
US Citizenship required
Ability to obtain a US Government Security Clearance
Bachelor's degree in Electrical Engineering, Computer Science, or in a STEM related field of study
3+ years of experience with Memory design or Memory Compiler development and implementation
Preferred Qualifications:
Active US Government Security Clearance with a minimum of Secret level
Post Graduate degree in Electrical Engineering, Computer Science, or in a STEM related field of study
Proficient in common memory types, including SRAM, Register Files (RF), and ROM, with a solid understanding of CMOS digital circuit design principles
Knowledgeable in both behavioral and physical modeling of memory architectures, supporting accurate simulation and verification
Hands-on experience with customer support in at least one of the following domains: Memory Design, Memory Compiler Design, eFUSE and antiFUSE and MBIST
Experience with IP development is a strong plus
Proficient in scripting languages like Perl/Tcl/Python, and power-aware RTL and UPF flow is a plus
Experience in ASIC or SoC development
What We Offer
Opportunity to work with cutting-edge memory technologies for aerospace, defense, and government applications
Direct customer engagement and technical leadership in advanced memory design
Access to Intel's most advanced foundry technologies and comprehensive memory IP portfolio
Competitive compensation
Professional development in memory design methodologies and foundry services
Direct impact on national security through advanced memory semiconductor solutions
Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, Arizona, Phoenix
Additional Locations:
US, California, Santa Clara, US, Oregon, Hillsboro
Business group:
The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel (https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003) .
Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
  • United States

Sprachkenntnisse

  • English
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