CPU Design Verification Engineer - CPU DV / Microprocessor Verification / SystemVerilog / UVM -[...]Jobster • Cambridge, England, United Kingdom
CPU Design Verification Engineer - CPU DV / Microprocessor Verification / SystemVerilog / UVM -[...]
Jobster
- Cambridge, England, United Kingdom
- Cambridge, England, United Kingdom
Über
CPU Design Verification Engineer - CPU DV / Microprocessor Verification / SystemVerilog / UVM . We are partnered with a global semiconductor company with a major engineering presence in Cambridge. They are looking for a CPU Design Verification Engineer to work on high performance CPU and SoC products across a broad range of markets including CPUs, GPUs, ultra low power IoT, and wearable devices. What You Will Be Doing
Working with CPU and SoC Architects to understand architectural concepts and high level system requirements Developing detailed test plans and coverage plans based on architecture and microarchitecture specifications Defining and developing scalable and portable verification methodologies Building complete verification environments including stimulus, checkers, assertions, trackers, and coverage Developing verification plans and testbenches for assigned functional domains Executing verification plans including design bring up, DV environment bring up, regressions, feature enablement, and debug of failures Tracking and reporting DV progress using metrics such as coverage and bug status What We Are Looking For
Strong knowledge of CPU and microprocessor verification and architectures, with experience in areas such as cache coherence, memory ordering and consistency, prefetching, branch prediction, renaming, speculative execution, and address translation or memory management Experience with random instruction sequencing and block, subsystem, and chip level verification Experience leading or mentoring a small team of verification engineers Exposure to advanced verification techniques such as formal verification, assertions, and silicon bring up In depth understanding of microprocessor functions, architectures, and microarchitectures Experience writing test plans, portable testbenches, transactors, and assembly code Hands on experience with verification tools and methodologies including simulators, coverage, gate level simulation, waveform viewers, and formal tools Location Requirement
This role requires 5 days per week onsite in our client’s Cambridge office. If this sounds interesting and you’d like to learn more, click the link below to apply or email me with a copy of your CV on smouland@eu-recruit.com By applying to this role you understand that we may collect your personal data and store and process it on our systems. For more information please see our Privacy Notice (https://eu-recruit.com/about-us/privacy-notice/)
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Sprachkenntnisse
- English
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