Sr. Staff Design for Test EngineerSynaptics Incorporated • Cambridge, England, United Kingdom
Sr. Staff Design for Test Engineer
Synaptics Incorporated
- Cambridge, England, United Kingdom
- Cambridge, England, United Kingdom
Über
Synaptics is leading the charge in AI at the Edge, bringing AI closer to end users and transforming how we engage with intelligent connected devices, whether at home, at work, or on the move. As the go-to partner for the world’s most forward-thinking product innovators, Synaptics powers the future with its cutting-edge Synaptics Astra™ AI-Native embedded compute, Veros™ wireless connectivity, and multimodal sensing solutions. We’re making the digital experience smarter, faster, more intuitive, secure, and seamless. From touch, display, and biometrics to AI-driven wireless connectivity, video, vision, audio, speech, and security processing, Synaptics is the force behind the next generation of technology enhancing how we live, work, and play.
Overview Synaptics is looking for a Sr. Staff Design for Test Engineer to join our dynamic and growing organization. You will be responsible for driving DFT architecture and the implementation of MBIST, SCAN, and BSCAN for multi-million gate SoCs targeted for Voice Assistant & Multimedia applications. This position reports to the Senior Director, ASIC Design.
Responsibilities & Competencies Job Duties
Develop DFT architecture and the implementation of MBIST, SCAN, and BSCAN for multi-million gate SoCs targeted for Voice Assistant & Multimedia applications
Collaborate with other team members to drive DFT methodology and flow to make it more efficient
Responsible for pre-silicon validation for all the DFT logic in block/full-chip
Synthesize / optimize the DFT logic for best PPA
Responsible for the Static Timing Closure for all the test logic in block/full-chip
Work with Test Engineering to bring-up/validate test patterns on ATE
Competencies
Deep understanding of DFT architecture and digital methodologies
Excellent communication, interpersonal and analytical skills, including the ability to communicate complex, interactive design concepts clearly
Ability to work with dynamic, geographically distributed teams, with the passion to become part of cross-functional teams as necessary to ensure testability
Proactive, self-starter, able to work independently in a fast-paced environment to complete projects on time with minimal guidance
Well organized with strong attention to detail; proactively ensures work is accurate
Positive attitude and work ethic; unafraid to ask questions and explore new ideas
Resourceful and able to solve complex problems through adaptation of existing technology and investigation of new technology to resolve complex problems
Qualifications (Requirements)
Bachelor’s (or master’s) degree in Electrical Engineering or related field or equivalent
12+ years of experience
Hands on expertise with DFT architecture – DFT planning for complex multi-million gate SoCs
Hands on expertise with Scan/EDT, MBIST, and Boundary Scan for complex multi-million gate SoCs in cutting edge process nodes
Experience in creating iJTAG structure in Verilog
Experience with deep debug through waveform
Direct experience using PERL scripting to create and maintain EDA tool flows
Experience with Logic Synthesis and Static Timing Closure is a strong plus
Working knowledge of Tessent tool flow is a strong plus
No travel required
Belief in Diversity Synaptics is an Equal Opportunity Employer committed to workforce diversity. Qualified applicants will receive consideration without regard to race, sex, sexual orientation, gender identity, national origin, color, age, religion, protected veteran or disability status, or genetic information.
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Sprachkenntnisse
- English
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