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Senior Hardware Design EngineerZhuzhou CRRC Times Electric UK Innovation CenterBirmingham, England, United Kingdom
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Senior Hardware Design Engineer

Zhuzhou CRRC Times Electric UK Innovation Center
  • GB
    Birmingham, England, United Kingdom
  • GB
    Birmingham, England, United Kingdom

Über

Overview of the role We are looking for a Senior Hardware Design Engineer to join our team at TEIC. This role will be responsible for circuit design, simulation analysis, test verification of power semiconductor devices.
What you will be doing in this role
Design and development of control board and gate drive board for power semiconductor devices that rated 1200V or higher
Ensure hardware solutions, detailed technical design and PCB design meet technical specifications
Hardware circuit analysis, including FMEDAs, FTAs, and diagnostic coverage analysis, DFMEA, DRBFM reliability analysis, etc., define technical specifications and complete work reports
Hardware design simulation calculations, including tolerance, worst case, derating, EMC, thermal simulation, etc., define technical specifications and prepare work reports
Circuit testing, validation and calibration work, and complete test specifications and reports
Electronic material management, PCB package library management
Summary and validation of design experience/criteria
Collaborative reliability engineers to complete reliability testing and coordinate with system engineers for integration testing
Work with project managers and manufacturing departments or contractors to ensure timely and cost-effective prototypes are produced at the expected cost
Responsible for electronic circuit test fixture preparation
We would like you to have
First class degree or upper 2nd in Engineering, Electronics, Physics or other relevant field (or equivalent experience)
5 years working experience on power electronics product design
Familiar with power electronic semiconductor device applications
Experience with high power switching power supply development project
Good at Altium Designer, Cadence or similar software
Have two-level or three-level driver application experience. The bus voltage of the inverter is 600V or higher. The rated power of the inverter is 200KW or higher.
Able to produce schematics of the gate driver board independently, including the design of the power circuit, gate driving circuit, protection circuit and control circuit.
Familiar with DSP, FPGA circuit design
Hands on experiences with uC resource allocation and Base Software configuration
Rich experiences in circuit board debugging and double-pulse testing
Previous experience in HALT, quantitative ALT would be desirable
TEIC is a great place to work with opportunities for professional and personal development. Our benefits include:
25 days holiday + 8 bank holidays
Holiday allowance increase with length of service
Free on-site car parking
Free EV charging
Free lunch Monday to Friday
Contributory Pension
Life assurance
Company sick pay
To find out more about TEIC visit www.teic.crrczic.cc.
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  • Birmingham, England, United Kingdom

Sprachkenntnisse

  • English
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