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SRAM Circuit Design EngineerApple • Santa Clara, California, United States
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SRAM Circuit Design Engineer

Apple
  • US
    Santa Clara, California, United States
  • US
    Santa Clara, California, United States
Ähnliche Jobs finden

Über

Do you have a passion for crafting entirely new solutions? Be a part of a world-class silicon design team which delivered an incredible high performance M1 chip for our Mac line of products and chips for our flagship products (iPhone, iPad, Mac, Airpods, HomePod and Watch). As part of our Digital Custom Group (DCG), you'll take imaginative and revolutionary ideas and determine how to turn them into reality You and your team will apply engineering fundamentals and start from scratch if needed, bringing forward-thinking ideas to the real world. Join us, and you'll help design the foundation that allows us to bring customers experiences they've never before envisioned This is a highly visible role at the heart of a silicon design effort, making a critical impact delivering products to market quickly. Your designs will strongly influence CPU / GPU / SoC / Neural Engine / Camera designs in Apple's Custom Silicon group.
Description
Imagine yourself at the center of our hardware development effort. Where you will collaborate with all fields, playing a strategic role of getting functional products to millions of customers quickly. You will have the opportunity to integrate and come up with new insights, work with a team of hardworking engineers, and implement groundbreaking techniques of Machine Learning, Circuit design in Apple's marquee products like M1 and A14 Bionic. As an SRAM Circuit Designer for the Digital Custom Group, you will perform the following: - Design and implement custom digital circuits for SRAM design. - Work with an extraordinary logic/architecture team to formulate design specifications. - Define architecture/topologies optimizing for power, timing, area and yield. - Schematic capture, simulations/analysis, margin verifications. - Functional equivalency and DFT modeling. - Work with layout team to create optimal GDS. - Verify extracted GDS meets design specifications. - Backend verification, IR/EM. - Write RTL, validate use-cases, verify against design schematics. - Support post-silicon effort to enable productization.
Minimum Qualifications
Minimum requirement of a Bachelors degree in a relevant field
Preferred Qualifications
We are looking for applicants with interest in the SoC design cycle, developing circuits and SRAM/Register File for low power, low voltage and high performance.
Knowledge of Cache design/architecture, memory hierarchy is a huge plus.
Working knowledge of RTL modeling.
Solid understanding of industry-standard design tools.
Deep understanding of nanometer device physics, leakage mechanisms, technology interactions with device behavior.
Ability to devise experiments and analyze data for silicon debug.
Machine Learning algorithms (ML) and scripting is a big plus.
  • Santa Clara, California, United States

Sprachkenntnisse

  • English
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