Principal Physical Design Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering Microsoft's "Intelligent Cloud" mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for a Principal Physical Design Engineer to help achieve that mission. 

As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the AISiE team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for a Principal Physical Design Engineer for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure.  

 We are looking for a Principal Physical Design Engineer to join the team. 

We are seeking a experienced Principal Physical Design Engineer to join our dynamic team. As a Principal Physical Design Engineer, you will be responsible for Physical Design tasks at block, sub-chip, and/or full-chip level.  The tasks will include Floorplanning, Synthesis, Placement, CTS and custom clocking, Routing, Static Timing, Physical Verification, Formal Equivalency, Power Efficiency, IR-Drop, and EM.  You may also be involved in Physical Design flow development/automation and evaluation of and recommendations for technology, IP, and vendor selection. 

• Lead the PnR convergence recipe development for designs in a subsystem/Subchip and lead the PnR convergence for designs within the subsystem/subchip.
• Collaborate with Architecture, design, and implementation teams to ensure that floorplan meets design requirements and constraints.
• Develop and implement methodologies and strategies to improve physical design efficiency and performance.
• Develop and implement methodologies and strategies to sign off blocks, subsystem/Subchip in the areas of static timing, physical verification, logics equivalence, low power verification and electromigration and IR drop.
• Conduct physical design reviews, identify and resolve design issues, and provide guidance to junior engineers.
• Work closely with cross-functional teams to drive project success and meet project milestones.
• Stay current with industry trends and emerging technologies to continuously improve physical design processes and methodologies. 

Required Qualifications:

• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience.

Other Requirements:

Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/