Senior Validation Engineer
- California, Maryland, United States
- California, Maryland, United States
Über
Job Title: Senior Validation Engineer
Location:
San Jose, CA
Employment Type:
Full-time / Onsite
Position Summary
We are seeking a highly skilled
Senior Validation Engineer
with strong experience in
memory interface bring-up/validation (DDR4/DDR5, LPDDR4/LPDDR5)
,
lab-based electrical characterization
, and
FPGA-based validation
. The ideal candidate will have hands-on expertise working in high-speed hardware environments and developing automation scripts to support validation workflows.
Key Responsibilities
Perform
platform-level electrical validation and characterization
of DDR memory interfaces (DDR4/DDR5, LPDDR4/LPDDR5) and high-speed I/O standards.
Lead
bring-up, debug, and validation
of FPGA-based platforms and prototypes.
Utilize lab equipment such as
oscilloscopes, logic analyzers, BERTs, power analyzers
, etc., to validate system performance and characterize signal integrity.
Develop and maintain
automation scripts
using Python, Tcl, or equivalent languages to support validation and data collection.
Collaborate with cross-functional teams including hardware design, firmware, and systems engineering.
Analyze test data, prepare reports, and present findings with recommended corrective actions.
Support root-cause analysis and board-level/system-level debugging efforts.
Must Have Skills
Strong experience in memory interface bring-up or validation
, including DDR4/DDR5 and LPDDR4/LPDDR5.
Hands-on experience in a lab environment
using oscilloscopes and other electrical validation tools.
Working knowledge of scripting languages
, such as Python or Tcl.
3–4 years of direct FPGA bring-up or validation experience
.
Experience & Educational Requirements
Bachelor's degree in
Electrical Engineering, Computer Engineering
, or related field with 5
years of relevant experience
,
OR
Master's degree with
5+ years
of directly related experience.
Proven experience in
platform-level electrical characterization
of DDR memory interfaces and I/O standards.
Experience with
FPGA validation
, board bring-up, debugging, and system characterization.
Advanced degree is a
plus
.
Preferred Qualifications
Experience with
signal integrity measurements
and high-speed PCB design considerations.
Familiarity with JTAG, PCIe, SerDes, or other high-speed protocols.
Experience with automation frameworks or lab management tools.
Sprachkenntnisse
- English
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