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Senior Staff GPU Physical Design EngineerBayOne Solutions • United States
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Senior Staff GPU Physical Design Engineer

BayOne Solutions
  • US
    United States
  • US
    United States
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Über

Title:
Senior Staff GPU Physical Design Engineer Duration 6+ contract (Possible extension) Location:
Austin, TX or San Jose, CA. Must be available to work (5) days per week at the client office. Payrate : Market Standards Position Summary We are seeking a Senior Staff GPU Physical Design Engineer for our client to work on the physical implementation of high-performance GPU and system-level IP, driving execution across synthesis, place-and-route, timing closure, and signoff for Samsung’s advanced technology nodes. This role will help lead the implementation execution and methodology improvements for complex GPU design blocks from concept to tape-out. The ideal candidate will bring strong GPU physical design and implementation expertise with a collaborative mindset to help deliver high-quality silicon that meets market-differentiating power, performance, and area (PPA) targets across parallel development cycles. Help lead block-level physical design implementation, including floorplanning, placement, routing, timing closure, and signoff for GPU designs. Contribute to the timing, power, and physical signoff activities, enabling STA-driven optimization, DRC/LVS convergence, and reliability considerations across GPU blocks. Advance methodology and flow improvements, including scripting, automation, and tool usage to improve efficiency and design quality. Drive cross functional collaboration with teams across architecture, RTL, design verification, physical design, software, and system level to resolve implementation challenges and support execution from synthesis through tape-out. Provide leadership support across physical design teams, spanning implementation, derivative, and methodology development—enabling efficiency, robust automation, and consistent adoption of best practices. Advance best practices by maintaining technical documentation and staying ahead of emerging GPU technologies. Skills And Qualifications 11+ years of experience with a Bachelor’s Degree in Computer Science/Engineering, or 9+ years of experience with a Master’s Degree, or 7+ years of experience with a Ph.D. Strong hands-on experience in full physical design flows, including synthesis, place-and-route, clock tree synthesis (CTS), timing closure, and signoff Strong proficiency with Synopsys or Cadence tools (ICC2/Fusion Compiler or Innovus, PrimeTime/Tempus, StarRC) Strong experience in physical design implementation for complex GPU or SoC designs, including low-power design and physical verification (DRC/LVS) Experience with timing analysis and closure methodologies, including STA and signal integrity Experience with advanced node design (≤5nm), including congestion, IR drop, and variability considerations Strong proficiency in scripting and automation (Python, Tcl, Shell, Perl) Strong analytical skills, attention to detail, and problem-solving skills using data-driven approach Excellent written and verbal communication skills for documenting designs, methodologies, and best practices Excellent collaboration skills, with the ability to navigate ambiguity and maintain ownership in a fast-paced, global environment Preferred Qualifications Experience with block-level implementation on complex SoC designs Exposure to advanced nodes (≤5nm) Exposure to GPU or high-performance compute architectures
  • United States

Sprachkenntnisse

  • English
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