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Senior Analog Layout Engineer - Timing-Critical Chipsjobtraffic • Ireland
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Senior Analog Layout Engineer - Timing-Critical Chips

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  • IE
    Ireland
  • IE
    Ireland
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À propos

A semiconductor company is seeking a Principal Analog Layout Engineer based in Galway, Ireland.
Interested in this role You can find all the relevant information in the description below.
The ideal candidate will have a minimum of 5 years of experience, ideally more than 8, in analog layout engineering.
Expertise in layout for critical timing, particularly for PLLs and DLLs, is essential.
Experience with Cadence tools is also required. xcfaprz
This role offers the opportunity to work in a dynamic environment with a focus on advanced technologies and layout practices.
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  • Ireland

Compétences linguistiques

  • English
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