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Sr. ASIC Design Verification Engineer (Silicon Engineering)
- United States
- United States
Über
We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network. RESPONSIBILITIES:
Responsible for digital ASIC verification at block and system level
Write and review test plans, develop test harnesses and test sequences
Responsible for test plan execution, running regressions, code and functional coverage closure
Contribute towards pre-silicon verification, chip bring-up and post-silicon validation
Be a hands-on self-starter who can execute the steps required to fully verify a complex digital designs
BASIC QUALIFICATIONS:
Bachelor’s degree in electrical engineering or computer engineering
5+ years of experience with design verification and test bench development
PREFERRED SKILLS AND EXPERIENCE:
Advanced degree in electrical engineering or computer engineering
Experience with verification methodologies such as UVM/OVM/VMM
Strong object-oriented programming knowledge
Strong problem-solving and coding skills
Experience in constrained random verification
Expertise in developing test plans, implementing coverage models, and analyzing results
Experience with scripting languages, e.g. Python for automation
RTL design, chip bring-up, and post-silicon validation experience
Ability to work in a dynamic environment with changing needs and requirements
ADDITIONAL REQUIREMENTS:
Ability to work extended hours and weekends as needed to meet critical milestones
COMPENSATION & BENEFITS:
Pay range: Design Verification Engineer /Senior: $165,000.00 - $260,000.00/per year
Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.
Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock, stock options, or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation & will be eligible for 10 or more paid holidays per year. Exempt employees are eligible for 5 days of sick leave per year. ITAR REQUIREMENTS:
To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.
SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
Applicants wishing to view a copy of SpaceX’s Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to EEOCompliance@spacex.com .
Sprachkenntnisse
- English
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