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ASIC Design Engineer II - PPA & Flow Automation

Cadence Design Systems

Austin, Texas, United States

Austin, Texas, United States

Über

Cadence Design Systems, based in Austin, Michigan, is seeking an experienced engineer to implement RTL-to-GDSII for in-house and customer designs. The role involves developing and automating EDA flows using Cadence tools, ensuring best-in-class IP cores. Ideal candidates should have a degree in Electronics and at least 2 years of relevant experience. Exceptional benefits include a competitive salary ranging from $87,500 to $162,500 annually, along with options for bonuses, equity, and comprehensive health plans.
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Austin, Texas, United States

Sprachkenntnisse

English

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