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Hardware Design Principal EngineerEmergiTelUnited States
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Hardware Design Principal Engineer

EmergiTel
  • US
    United States
  • US
    United States

Über

Hardware Design Principal Engineer (Signal Integrity),
Santa Clara, California, USA, Permanent Role Compensation Range : $225K–$275K USD Join a leading semiconductor technology company designing next-generation PCIe Gen5/Gen6 validation and reference boards. Key Expertise: • Signal Integrity (SI) • PCIe Gen4/Gen5/Gen6 • PAM-4 & 25 Gbps SERDES • Cadence Sigrity, HFSS, ADS, HyperLynx • High-Speed PCB Design • Board Bring-Up & Validation Requirements: • BS + 5–10 years or MS/PhD + 3–5 years • Lead Signal Integrity Engineering experience • Strong high-speed design and EM fundamentals Vacancy Status This is an active position currently open for hiring. Use of Artificial Intelligence No artificial intelligence (AI) is used in the screening or selection process. All applications are reviewed by our recruitment team. Equal Opportunity emergiTEL is committed to creating a diverse and inclusive workplace. We welcome applications from all qualified individuals regardless of background. Hiring decisions are based solely on skills, experience, and qualifications relevant to the role. Apply Today
  • United States

Sprachkenntnisse

  • English
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