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DFT Engineer

Lausanne, Switzerland

(Closed Position)

Our hiring company is a promising startup active within the Semiconductor industry. They created a job offer for a DFT Engineer to integrate into their teams in Lausanne, Switzerland location.

Your tasks

  • Driving the DFT architectures, methodologies and tool flows
  • Driving the engineering team
  • Define the test plan
  • Coordinating the functional/structural tests for final/wafer test program development
  • Defining with the team, the HTOL test suits/cycle times/bring up on burnin boards

Your profile

  • Language skills: English (C1, fluent)
  • Professional experience: min 5 years of experience in chip design industry experience
  • Strong System Verilog, RTL Coding skills
  • Good understanding of ATE, Wafer bring up debug issues
  • Expert skill set in using industry-standard EDA tools in the area of DFT, Synthesis, STA, Simulation tools
  • Good understanding of chip level architecture SoC, ASIC
  • Knowledge of lab bench SIlicon debug, Characterization
  • Scripting Knowledge in Python / Shell / TCL etc.,
  • Industry Standard DFT architectures/methodologies
  • Gate level timing simulations


This career opportunity is based in Lausanne, Switzerland.

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YOU WON’T apply for this specific position but rather if there is a match with this opportunity, you will be contacted and have more details about it.