S'INSCRIRE

Offres d'emploi

Trouvez des postes près de chez vous, sur site, hybrides ou à distance.
  • Emplois similaires à : Senior Software Engineer - Chip Design Tools
XX
Senior Software R&D Engineer, VLSI Physical DesignNVIDIA Gruppe • Austin, Texas, United States
Postuler Maintenant
XX

Senior Software R&D Engineer, VLSI Physical Design

NVIDIA Gruppe
  • US
    Austin, Texas, United States
  • US
    Austin, Texas, United States
Postuler Maintenant

À propos

NVIDIA’s success builds on a foundation of industry‑leading hardware. We develop internal EDA tools powered by parallel computing, machine learning and specialized algorithms for VLSI design. We are seeking a Senior R&D Software Engineer with proven experience in VLSI Physical Design Algorithms (sizing, buffering, CTS, legalization, incremental place and route, etc.). Understanding both software and hardware aspects is key. Creativity and a self‑drive to explore and perfect fast, high‑capacity software is required. What you’ll be doing: Invent new optimization engines that fuse traditionally independent engines (e.g., co‑optimization of legalization and sizing) to increase chip frequency while minimizing power consumption across a suite of internal optimization tools. Improve algorithms (in C++) for gate‑level sizing, buffering, useful clock skew, cell legalization, power minimization, ECO routing, and incremental parasitic extraction. Own the whole process from discovery and invention of new optimization opportunities, through developing solutions, and working directly inside design teams to facilitate deployment. What we need to see: BS, MS, PhD or equivalent experience in Electrical Engineering or Computer Science. 6+ years in VLSI algorithms development using C++. Strong understanding of VLSI timing optimization and related concepts, including cell libraries, interconnect models, crosstalk, glitches, IR drop, timing constraints, corners, congestion, etc. Familiarity with design implementation tools such as ICC2, Innovus, PrimeTime, Tempus, and StarRC and typical design flows written in Perl, Tcl, and Python. Strong communication and interpersonal skills. Ways to stand out from the crowd: C++14 or newer experience, such as lambdas and concurrency. Detailed understanding of how multiple Physical Design steps interact and how they can be fused to form hybrid engines. Experience in high‑performance software design including multithreading, distributed computing, efficient memory and I/O use. Highly driven to craft outstanding software toward improving PPA with a dedication to continuous improvement. Experience with reinforcement learning, GNNs and other relevant machine learning frameworks, especially as applied to physical design. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary ranges are $168,000USD–$264,500USD for Level4, and $196,000USD–$310,500USD for Level5. You will also be eligible for equity and benefits. Applications are accepted at least until May 23, 2026. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work environment and is proud to be an equal opportunity employer. We do not discriminate on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
#J-18808-Ljbffr
  • Austin, Texas, United States

Compétences linguistiques

  • English
Avis aux utilisateurs

Cette offre provient d’une plateforme partenaire de TieTalent. Cliquez sur « Postuler maintenant » pour soumettre votre candidature directement sur leur site.