À propos
Hardware Engineer (PCell/pyCell) Duration:
12+ Months Location:
Remote Job Description This role will require: Design, implement, and maintain robust parameterized cells (PCell/pyCell) for devices, primitives, and layout generators. Ensure parameter validation, geometry correctness, DRC/LVS cleanliness, pin/label conventions. Implement and test PCells in Cadence Virtuoso (SKILL/SKILL++) and Synopsys Custom Compiler (PyCell/Python; OA APIs). Drive physical verification readiness using Cadence PVS and/or Synopsys IC Validator (ICV); coordinate with teams using Siemens Calibre when needed. Validate extraction views for Cadence Quantus / Synopsys StarRC; ensure netlisting and simulation coherence across flows. Establish unit/functional tests for PCells, regression suites, and golden reference layouts.
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Compétences linguistiques
- English
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