Physical Design Engineer

Sintegra Inc.

United States

United States

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À propos

Analog Layout Engineer – 3nm Designs Are you ready to apply Make sure you understand all the responsibilities and tasks associated with this role before proceeding. About the Role Encharge AI is seeking Analog Layout Engineers with proven expertise in advanced process nodes. This is a unique opportunity to contribute to cutting-edge AI hardware development, working on 3nm design implementations that push the boundaries of performance and efficiency. Responsibilities Execute analog layout design for complex circuits at 3nm technology node. Collaborate closely with design and verification teams to ensure layout accuracy, performance, and manufacturability. Perform layout verification, DRC/LVS checks, and resolve design rule challenges. Optimize layouts for power, performance, and area (PPA) while meeting reliability and yield requirements. Contribute to design reviews and provide technical input on layout methodologies and best practices. Requirements Strong hands-on experience in analog layout design at advanced nodes (preferably 3nm). Proficiency with industry-standard EDA tools for layout and verification. Solid understanding of analog circuit design principles and layout techniques. Ability to work in fast-paced, cross-functional engineering teams. Excellent communication and problem-solving skills. Nice to Have Experience with high-performance AI/ML hardware designs. Familiarity with mixed-signal layout and advanced reliability considerations. xywuqvp Knowledge of power integrity and signal integrity challenges at advanced nodes.

United States

Compétences linguistiques

English

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