À propos
Ascendion | Engineering to elevate life
We have a culture built on opportunity, inclusion, and a spirit of partnership. Come, change the world with us:
Build the coolest tech for world’s leading brands
Solve complex problems - and learn new skills
Experience the power of transforming digital engineering for Fortune 500 clients
Master your craft with leading training programs and hands‑on experience
Experience a community of change makers!
Join a culture of high‑performing innovators with endless ideas and a passion for tech. Our culture is the fabric of our company, and it is what makes us unique and diverse. The way we share ideas, learning, experiences, successes, and joy allows everyone to be their best at Ascendion.
About the Role
ASIC Power Engineer to perform power analysis and optimizations in ASIC for client’s AR/VR products.
Areas of interests include Machine Learning and primary languages are Python, TCL and SystemVerilog.
Design advanced chips for AR/VR devices.
Key Responsibilities
Perform PPA optimization with Fusion compiler.
Perform RTL and netlist level Power analysis
Perform post-processing and scripting on report log files for format conversion, data analysis and information extraction
Setup, run, debug and analyze reports of ASIC flows (Synthesis, PD, Power, Timing)
Implement some blocks at RTL and UPF
Ability to document and communicate clearly
Minimum Qualifications
10+ Years of experience as an ASIC Power engineer, or CAD Engineer/Physical Design engineer
Experience with power estimation tools and synthesis, some physical designKnowledge of power trade‑offs in design and back‑end implementation
Hands‑on experience in scripting, data analysis
Bachelor's degree in Electrical Engineering/Computer Science or equivalent experience
Desired Qualifications
DC, ICC, PrimeTime/PrimePower, VCS, Verdi) and/or Joules
Python, Perl (or similar) scripting and data‑post‑processing tools
Excel (or Matlab) for model fitting, data visualization and analysis
Experience in low power design, tools and methodologies including power intent UPF specifications
Some power profiling experience at SoC level
Master's degree or PhD inElectricalEngineering/ComputerScience or equivalent experience
Location Sunnyvale, CA [Onsite/Hybrid]
Salary Range The salaryfor this position is between$201,000 - $270,400 annually. Factors which may affect pay within this range may include geography/market, skills, education, experience, and other qualifications of the successful candidate.
Benefits
medical insurance
dental insurance
vision insurance
401(k) retirement plan
long-term disability insurance
short-term disability insurance
5 personal days accrued each calendar year. The Paid time off benefits meet the paid sick and safe time laws that pertains to the City/ State
10-15 days of paid vacation time
6 paid holidays and 1 floating holiday per calendar year
Ascendion Learning Management System
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Compétences linguistiques
- English
Avis aux utilisateurs
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