À propos
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This is a key role within a high-performing engineering team, ideal for someone who thrives on technical leadership and hands-on design work.
As a senior member of the digital design group, you'll take ownership of complex IP blocks and drive architectural, implementation, and verification decisions.
You'll collaborate cross-functionally with systems, analog, verification, and physical design teams to deliver high-quality silicon solutions to market.
Responsibilities Lead the design and development of digital IP for ASIC or FPGA platforms Define architecture and contribute to specification development Deliver high-quality RTL using Verilog or VHDL Guide and review synthesis, timing closure, and integration activities Work with verification teams on functional coverage and UVM-based testbenches Mentor junior engineers and provide technical leadership across projects Requirements 7+ years of experience in digital design within a semiconductor or related environment Strong RTL design expertise (Verilog/VHDL), with a solid understanding of SoC architecture Proven experience with industry-standard EDA tools for synthesis, timing, and simulation Exposure to SystemVerilog and UVM-based verification environments Experience with low-power design techniques, xcfaprz clock domain crossing, and DFT is advantageous Degree in Electronic Engineering, Computer Engineering, or related field Benefits: Competitive Salary Work from home (Limerick or Cork office) Stock options Performance Bonus Healthcare Pension IF/When you are interested get in touch with Daniel Brown at Reperio Human Capital Reperio Human Capital acts as an Employment Agency and an Employment Business.
Skills: Digital Design ASIC RTL FPGA Cork Limerick Benefits: Work From Home
Compétences linguistiques
- English
Avis aux utilisateurs
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