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SMTS SILICON DESIGN ENGINEERTHE ROLE:Are you passionate about pushing the boundaries of power efficiency and high-frequency computing? As a part of our AMD physical design central methodology team, you can help define timing, power, and clocking methodologies for our next-generation, high-performance cores, graphics and machine intelligence chips. This team collaborates across AMD, working on projects ranging from low power APUs to the world’s most powerful supercomputers.THE PERSON:In this multi-functional role, you will have the opportunity to work across multiple divisions to drive physical design methodology optimizations across the entire physical design space (library/technology/flows/design). We’re looking for someone with excellent attention to detail, passion and curiosity to resolve complex issues while achieving amazing results!KEY RESPONSIBILITIES:Responsibilities may include a subset of the following topics:Drive PVT corners/ frequency targets while considering various product performance modes and guard bandsDrive IP physical implementation recipes from synthesis to route to achieve the best performance/wattRTL (architecture) and PD co-development to identify bottlenecksDrive budgeting, measurement, analysis and tracking of power-consumptionEstablish global methodologies and best-known physical implementation recipes for optimal performance/watt across library/flow/Synthesis/P&R environmentDrive best practices for global/local clock distribution methodologies including skew/power/jitter trade-off’sCreate guidelines on clocking/timing/power sign-off methodologiesPREFERRED EXPERIENCE:Expertise in these topics would be a plus:Design experience in sub-micron processesFamiliarity with CPU and or GPU architectureHands on experience with power-analysis and measurement tools like Prime Power and or Power-ArtistExperience with high performance clockingSTA methodologies for timing closure, OCV and other advanced statistical margining techniquesProficiency in scripting languages such as Perl/Tcl/PythonProficiency in data analysis and interpretationACADEMIC RESPONSIBILITIES:MS/PhD degree in Electrical Engineering is preferredMastery of logic, circuit design, and CAD tools for high-performance design is expected.LOCATION: Austin, TX; Boston, MA; Santa Clara, CA; Ft. Collins, CO or Markham, CNThis role is not eligible for Visa sponsorship.#LI-DD3
Benefits offered are described:
AMD benefits at a glance.AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.
We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.
AMD’s “Responsible AI Policy” is available here.This posting is for an existing vacancy.
Compétences linguistiques
- English
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