Senior Design Verification Engineer - UVM/SystemVerilogjobtraffic • Ireland
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Senior Design Verification Engineer - UVM/SystemVerilog
jobtraffic
- Ireland
- Ireland
À propos
Make sure to read the full description below, and please apply immediately if you are confident you meet all the requirements.
This role involves the development of verification plans for innovative semiconductor designs and collaboration with cross-functional teams.
Candidates should have a bachelor's degree in Electrical or Computer Engineering, strong communication skills, and proficiency in SystemVerilog and UVM methodologies. xcfaprz
The position supports hybrid work arrangements, offering a dynamic work culture focused on innovation.
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Compétences linguistiques
- English
Avis aux utilisateurs
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