VHDL Design EngineerSurrey Satellite Technology Ltd (SSTL) • London, England, United Kingdom
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VHDL Design Engineer
Surrey Satellite Technology Ltd (SSTL)
- London, England, United Kingdom
- London, England, United Kingdom
À propos
Key Tasks
Design, develop, and simulate FPGA designs in VHDL
Take mission requirements and translate down to FPGA implementation
Perform simulation, synthesis and timing analysis to verify functionality and performance
Create testbenches for functional verification
Generate appropriate design documentation
Work closely in a core project team.
Responsible for the delivery of all aspects of the defined/delegated package of work, including Technical Solution, Budget and Schedule.
Experience
Several years experience of FPGA design.
Experience of system level debug and test.
Knowledge & Skills
Knowledge of FPGA design in VHDL
Knowledge of Lab Test Equipment
Excellent communication skills
Commitment to deliver to challenging schedules
Good inter‑personal skills
Organised approach
Good planning skills
Additional Responsibilities
Involvement in SSTL peer reviews
Seniority level Mid‑Senior level
Employment type Full‑time
Job function Engineering and Information Technology
Industries Aviation and Aerospace Component Manufacturing
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Compétences linguistiques
- English
Avis aux utilisateurs
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