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Staff Engineer, Digital Design Engineering (AI/ML)1010 Analog Devices Inc. • Chandler, Arizona, United States
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Staff Engineer, Digital Design Engineering (AI/ML)

1010 Analog Devices Inc.
  • US
    Chandler, Arizona, United States
  • US
    Chandler, Arizona, United States
Jetzt Bewerben

Über

Company Overview
About Analog Devices Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X. Key Responsibilities
Apply AI/ML methodologies to improve synthesis results, timing closure, power estimation, and design space exploration Develop and implement digital subsystems for mixed‑signal ICs, including control logic, digital interfaces, and on‑chip processing blocks Execute RTL design, coding, and optimization in Verilog/SystemVerilog for performance, area, and power targets Perform synthesis with timing and placement constraints (Genus), static timing analysis and power analysis (Tempus), and logical equivalence checking (Conformal) Participate in architecture and design reviews, contributing technical analysis on timing, area, power, and testability trade‑offs Collaborate with analog design teams to implement and integrate digital‑analog interfaces and control architectures Required Skills and Experience
MSEE or MSCE with 7+ years of digital IC design experience, or PhD with 5+ years (BSEE/BSCE with equivalent depth considered) Strong RTL design skills in Verilog/SystemVerilog with experience delivering complex digital subsystems Demonstrated ability to deliver digital designs through tape‑out, silicon validation, and production release Solid scripting skills (Python, Tcl, shell) with experience applying AI/ML techniques to enhance productivity Knowledge of synthesis, static timing analysis, DFT (scan, ATPG, BIST), and clock domain crossing methodologies Proficiency with Cadence digital design tools: Genus, Innovus, Tempus, Conformal Excellent presentation, technical writing, and communication skills Preferred Qualifications
Curiosity and initiative to explore AI/ML techniques and emerging tools that can transform design workflows, with an enthusiasm for discovering more effective ways of working Working knowledge of place‑and‑route (Innovus), floorplanning, and physical‑aware design techniques Experience with low‑power design techniques including multi‑voltage domains, power gating, and UPF Familiarity with digital interfaces (I2C, SPI, UART) and mixed‑signal SoC integration Strong analytical and problem‑solving abilities Technical Scope
Application of AI/ML‑driven workflows to improve design quality, turnaround time, or coverage Block‑level digital subsystem ownership from specification through silicon bring‑up and production validation Clock domain crossing analysis, lint, and formal verification for multi‑clock digital architectures DFT implementation including scan insertion, ATPG pattern generation, and fault coverage closure Collaboration and Impact
Share AI/ML‑driven improvements to digital design workflows and best practices with team members Work with analog design, verification, and applications teams to implement digital control architectures that meet system‑level requirements Contribute to design reviews and cross‑team technical discussions Export Licensing
For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce – Bureau of Industry and Security and/or the U.S. Department of State – Directorate of Defense Trade Controls. As such, applicants for this position – except U.S. Citizens, U.S. Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process. Equal Opportunity Employer
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group. EEO is the Law: Notice of Applicant Rights Under the Law. Job Details
Job Req Type: Experienced Travel: Yes, 10% of the time Shift Type: 1st Shift/Days
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  • Chandler, Arizona, United States

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  • English
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