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Silicon Design Verification Engineer, Quantum AIGoogle Inc. • Goleta, California, United States
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Silicon Design Verification Engineer, Quantum AI

Google Inc.
  • US
    Goleta, California, United States
  • US
    Goleta, California, United States
Jetzt Bewerben

Über

Silicon Design Verification Engineer, Quantum AI Google Mountain View, CA, USA ; Goleta, CA, USA
X Note: By applying to this position you will have an opportunity to share your preferred working location from the following:
Mountain View, CA, USA; Goleta, CA, USA .
Bachelor's degree in Electrical Engineering or a related technical field, or equivalent practical experience.
4 years of experience in silicon design verification using SystemVerilog/UVM.
Experience with SOC verification including CPUs, bus interfaces, or peripherals.
Experience in scripting languages such as Python or Perl, for automation and analysis.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering or Computer Science.
2 years of experience with design verification.
Experience in ARM, RISC-V or any processor based DV including tool chains and C based testing, and with the full digital design verification cycle from spec through bring-up.
Experience with industry standard protocols, interfaces, and IP components, such as PCIe, Ethernet, and NoCs.
Experience running DV for mixed-signal ASICs containing analog and RF IP and building mixed-mode models for end-to-end DV coverage.
Experience working with one or more formal verification tools, such as JasperGold, VC Formal, Questa Formal, or 360-DV.
About the job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will be a vital member of the quantum electronics team, providing key technical contributions in the area of ASIC design verification (DV) as we realize sophisticated electronics for control and readout of our future quantum computers. You will work as part of a team of digital, DV, physical design, and radio frequency/analog/mixed-signal engineers, collaborating with adjacent teams in the electronic, software, and quantum engineering areas to implement complex ASICs for use in the readout and control of our scaled quantum processors.
As a Silicon DV Engineer, you will help drive the DV of all of Quantum’s control and readout electronics. You will contribute to the entire verification lifecycle for our ASICs, collaborating with ASIC architects, digital designers to understand the chip functional requirements, plan out verification plans, and drive execution of those plans in collaboration with other DV engineers. You will build out and track coverage metrics to ensure thorough verification of designs. You will also work with external IP vendors, overseeing the DV work that they directly provide on their own IP and collaborating with these vendors to create suitable DV integration coverage.
The full potential of quantum computing will be unlocked with a large‑scale computer capable of complex, error‑corrected computations. Google Quantum AI's mission is to build this computer and unlock solutions to classically intractable problems. Our roadmap is focused on advancing the capabilities of quantum computing and enabling meaningful applications.
Individual pay is determined by factors including job‑related skills, experience, and relevant education or training.
US: $138000 - $198000 (USD) + 15% bonus target + equity + benefits
Learn more about benefits at Google.
Plan the verification of complex digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Develop and maintain constrained‑random verification environments using System Verilog and Universal Verification Methodology (UVM).
Create and execute verification plans and test cases. Identify and debug verification failures.
Close coverage measures to identify verification holes and to show progress towards tape‑out.
Integrate any verification IP for externally developed IP into our overall verification flow.
Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents‑to‑be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy, Know your rights: workplace discrimination is illegal, Belonging at Google, and How we hire.
Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.
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  • Goleta, California, United States

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  • English
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