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  • Emplois similaires à : Senior Power Integrity & Chip Design Engineer
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Sr. Signal Integrity / Power Integrity Engineer, Annapurna Labs, Machine Learning HardwareAmazon • Austin, Texas, United States
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Sr. Signal Integrity / Power Integrity Engineer, Annapurna Labs, Machine Learning Hardware

Amazon
  • US
    Austin, Texas, United States
  • US
    Austin, Texas, United States
Postuler Maintenant

À propos

Sr. Signal Integrity / Power Integrity Engineer, Annapurna Labs, Machine Learning Hardware Annapurna Labs (our organization within AWS) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable just a short time ago. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world.
Key Responsibilities
Perform end‑to‑end high‑speed channel simulations to ensure signal integrity across complex designs.
Conduct SI/PI analysis to optimize PCB layouts, minimizing losses and signal degradation.
Utilize simulation tools such as ADS, MATLAB, Cadence, HFSS, and others to evaluate performance and troubleshoot issues.
Work with PCIe protocols and equalization techniques (DFE, CTLE, FFE) to optimize high‑speed interfaces.
Analyze clock distribution and jitter, ensuring signal timing and integrity across designs.
Collaborate with PCB layout and hardware design teams to define optimal stack‑ups and trade‑offs for manufacturing feasibility and performance.
Identify and mitigate PCB manufacturing issues, ensuring high production yield and reliability.
Work closely with cross‑functional teams, including hardware design, validation, and product engineering, to align on requirements and trade‑offs.
Basic Qualifications
Deep understanding of signal integrity concepts and strong analytical skills in signal and power integrity.
Hands‑on experience with simulation tools such as ADS, MATLAB, Cadence, HFSS, and others.
Proficiency in high‑speed channel simulations, including system‑level modeling and validation.
Experience with PCIe protocols and equalization methods (DFE, CTLE, FFE).
Knowledge of clock distribution and jitter analysis for high‑speed designs.
Expertise in PCB layout and board manufacturing processes, including identifying and mitigating potential issues.
Hands‑on experience in stack‑up design, including dielectric material selection, impedance control, and layer optimization.
Preferred Qualifications
Experience in power integrity analysis and power delivery network (PDN) optimization.
Familiarity with high‑speed design compliance testing and validation methodologies.
Knowledge of EMC/EMI mitigation techniques.
Base salary range:
USA, TX, Austin - 159,200.00 - 215,300.00 USD annually
Amazon offers a comprehensive benefits package that includes health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and optional Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits.
Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.
We are committed to providing accommodations for applicants with disabilities. If you need assistance during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information.
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  • Austin, Texas, United States

Compétences linguistiques

  • English
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