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Senior TPU Compute RTL Design Engineer

Google Inc.

Sunnyvale, California, United States

Sunnyvale, California, United States

À propos

Google Inc. is seeking an experienced ASIC Design Engineer to help develop custom silicon solutions for its products. This role involves working on data center accelerators and requires expertise in digital design, collaboration with various teams, and adherence to coding standards. Successful candidates will have at least 8 years of experience with SystemVerilog RTL and a strong educational background in electrical engineering or related fields. The position offers a competitive salary range of $163,000 to $237,000, along with bonuses and equity.
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Sunnyvale, California, United States

Compétences linguistiques

English

Avis aux utilisateurs

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