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DFT Design Engineer for SoC/ASICCadence Design Systems, Inc. • Austin, Texas, United States
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DFT Design Engineer for SoC/ASIC

Cadence Design Systems, Inc.
  • US
    Austin, Texas, United States
  • US
    Austin, Texas, United States
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À propos

Cadence Design Systems, Inc. is looking for a SoC/ASIC Digital Design Engineer in Austin, Texas. This role requires experience in Design for Test (DFT), including skills in scan chain insertion and Automatic Test Pattern Generation (ATPG). The ideal candidate should have 2-10 years of relevant experience and be adept in debugging testbenches and collaborating across teams. Candidates should exhibit strong problem-solving skills and the ability to thrive in a fast-paced project environment, showcasing a methodical approach to complex challenges.
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  • Austin, Texas, United States

Compétences linguistiques

  • English
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