IC Design Layout Engineer (Contract)Morson Edge • Southampton, England, United Kingdom
IC Design Layout Engineer (Contract)
Morson Edge
- Southampton, England, United Kingdom
- Southampton, England, United Kingdom
À propos
Southampton (20% onsite) Duration:
6 Months (Inside IR35) Rate:
£53.70 per hour Umbrella We seek an engineer with recent high-integrity or safety-critical industry experience (defence, aerospace, or similar), or eligible for UK security clearance. Overview An exciting opportunity is available for an experienced IC Design Layout Engineer to join a multidisciplinary electronics team working on advanced mixed-signal semiconductor technologies. The successful candidate will contribute to the physical implementation and verification of complex analogue and mixed-signal integrated circuits, collaborating closely with circuit designers to deliver high-quality layouts to demanding project schedules. Key Responsibilities Translate transistor, cell and block-level schematics into robust physical layouts. Produce bespoke analogue, digital and mixed-signal IC layouts in accordance with design specifications. Apply layout best practices to optimise performance, manufacturability and reliability. Perform physical verification including: Design Rule Checks (DRC) Layout Versus Schematic (LVS) Support top-level integration and verification activities where required. Work effectively within a collaborative engineering environment to meet project milestones. Essential Skills & Experience Several years of experience in analogue and mixed-signal IC layout design. Strong understanding of CMOS technologies and IC design methodologies. Proficiency with Cadence design tools. Experience producing layouts from schematic designs. Hands-on experience with simulation and verification workflows. Comfortable working in Linux environments. Strong attention to detail and ability to work independently. Desirable Experience CMOS readout IC or imaging sensor design experience. Image sensor or pixel design knowledge. Top-level verification experience. Exposure to a range of semiconductor technology nodes.
TPBN1_UKTJ
Compétences linguistiques
- English
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