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  • Emplois similaires à : Systems Software Engineer, Security, First Party Hardware
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Systems Software Engineer, Security, First Party HardwareThe Consulting Solutions • San Francisco, California, United States
Postuler Maintenant
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Systems Software Engineer, Security, First Party Hardware

The Consulting Solutions
  • US
    San Francisco, California, United States
  • US
    San Francisco, California, United States
Postuler Maintenant

À propos

About the Team OpenAI’s Hardware organization develops AI-native silicon and system‑level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co‑designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production‑ready hardware for OpenAI’s supercomputing platform. About the Role We’re seeking a Security Engineer to join our First‑Party Hardware team. In this role, you will own the end‑to‑end security foundation for OpenAI’s first‑party AI hardware systems, working across hardware security, embedded security, system security, and practical deployment at data center scale. Responsibilities Own security requirements, threat models, validation strategy, and launch‑readiness evidence for first‑party hardware platforms from early design through production deployment. Design and review secure boot, measured boot, roots of trust, platform firmware resilience, firmware signing, recovery, and anti‑rollback strategies across heterogeneous devices. Own device identity, provisioning, enrollment, attestation, certificate lifecycle, and key‑management requirements across manufacturing and data center bring‑up. Harden management interfaces and operational access paths across BMCs, hosts, accelerators, switches, and service tooling, including TLS/mTLS, Redfish, gNMI, SSH, syslog, and break‑glass workflows. Drive security requirements for manufacturing, supply chain, firmware/image signing, storage encryption, RMA, repair, and decommissioning processes. Build and drive validation for security‑critical hardware and firmware behavior, including debug lockout, lifecycle transitions, update paths, attestation evidence, and recovery flows. Partner with vendors and contract manufacturers to turn security requirements into concrete deliverables, test evidence, and launch gates. Drive end‑to‑end closure across design, implementation, manufacturing readiness, deployment readiness, fleet operations, and incident response when security issues arise. Investigate hardware and firmware security issues, assess exploitability and operational risk, and drive durable fixes with engineering owners. Qualifications 7+ years of hands‑on experience, or exceptional accomplishments demonstrating equivalent expertise, in hardware security, embedded security, firmware security, platform security, or low‑level systems security. Experience shipping or securing real hardware platforms, embedded devices, servers, accelerators, networking systems, BMCs, bootloaders, BIOS/UEFI, RTOS, kernels, or firmware update systems. Deep familiarity with secure boot, measured boot, TPMs, hardware roots of trust, device attestation, key provisioning, debug interfaces, firmware signing, recovery, or lifecycle‑state design. Strong applied‑cryptography judgment for secure boot, attestation, TLS/mTLS, key storage, certificate lifecycle, storage encryption, and long‑range transitions such as post‑quantum readiness. Ability to read and write systems code in C, C++, or Rust and to use that skill to review, prototype, test, or debug security‑critical behavior. Comfort with hardware‑software interfaces such as SPI, I2C, SMBus, PCIe, UART, JTAG, SWD, GPIOs, TPMs, and board‑level debug tools. Proven track record driving security improvements with hardware, firmware, infrastructure, manufacturing, operations, and partner teams. Experience owning broad, ambiguous security programs end to end, including translating risk into technical requirements, validation plans, and accountable engineering decisions. Clear written and verbal communication, with the ability to turn ambiguous security risks into actionable requirements, design reviews, tests, and decisions. Location: San Francisco, CA (Hybrid: 3 days/week onsite) Relocation assistance available. We are an equal opportunity employer, and we do not discriminate on the basis of race, religion, color, national origin, sex, sexual orientation, age, veteran status, disability, genetic information, or other applicable legally protected characteristic. To comply with U.S. export control laws and regulations, candidates for this role may need to meet certain legal status requirements as provided in those laws and regulations.
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  • San Francisco, California, United States

Compétences linguistiques

  • English
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