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Core Engineering - Design Engineer IIIArtech LLCUnited States

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Core Engineering - Design Engineer III

Artech LLC
  • US
    United States
  • US
    United States

About

JOB DETAILS:
Job Title:
Design Engineer III
Duration:
12 Months+ (Good possibility of extension)
Location:
Austin, TX (PREFERRED), OR Sunnyvale, CA
Max Pay Range:
$80-85/Hr. on W2
Job Description:
Responsibilities
Perform comprehensive power analysis at various design stages, spanning from RTL to GDSII.
Contribute to the development, improvement, and automation of various power analysis flows. This includes gathering and analyzing large datasets for power modeling via automated processes.
Investigate and address power inefficiencies, providing actionable feedback to the RTL design team.
Minimum Qualifications:
Demonstrated experience with RTL-to-GDSII design flow usage and development in advanced technology nodes (7nm and below).
Expertise in low-power implementation and signoff, including power gating, multiple voltage rails, and Unified Power Format (UPF) usage.
Proven experience in power analysis and reduction utilizing industry-standard tools such as PrimeTime PX/PrimePower.
Proficiency in scripting languages, with a strong emphasis on Python and ML/AI frameworks.
Working knowledge of RTL design principles.
Experience in RTL power optimization using specialized tools like Power-Artist.
Ability to learn quickly, explore new ideas, and iterate rapidly to achieve optimal results.
Preferred Qualifications:
Experience with synthesis and Place and Route (PnR) flows.
Experience analyzing Intellectual Property (IP) design for power characteristics and building run-time estimation models for use by software/firmware teams.
Skills in data analysis and data modeling, including the application of machine learning approaches.
Years of Experience / CW Level IV:
8-10 years
Top 3 Must-Have Skills:
Power analysis and reduction (with industry tools).
RTL-to-GDSII flow and low-power implementation.
Python scripting and ML/AI for automation and modeling.
Nice-to-Have Skills:
Experience with synthesis and Place and Route (PnR) flows.
Experience analyzing Intellectual Property (IP) design for power characteristics and building run-time estimation models for use by software/firmware teams.
Skills in data analysis and data modeling, including the application of machine learning approaches.
Previous meta experience preferred.
Degrees/Certifications
Must Have:
Bachelor degree in Electrical/Computer Engineering or Computer Science.
Master's Degree preferred but not required
Day-to-Day Responsibilities:
Running power simulation, analyzing & creating ideal design optimization.
Interview Process:
2- 30-minute round of interviews.
Confirming basic concepts, technical python coding questions (5-10 min).
Note from Hiring Manager:
Avoid profiles:
Focused primarily on
Physical Design / PnR (backend).
With
only signoff-level power analysis experience.
Engineers without
RTL or Design Verification (DV) exposure
Regards,
Adarsh Singh
Sr. Technical Recruiter
Cell:
(973) 507-7564
Email:
LinkedIn:
360 Mt. Kemble Avenue, Suite 2000, Morristown, NJ 07960
Website:
  • United States

Languages

  • English
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