About
Key Responsibilities
Conduct functional logic verification of SoC designs to ensure they meet design requirements and specifications.
Develop scalable and reusable verification plans, test benches, and environments for blocks, subsystems, and the entire SoC to meet coverage requirements.
Execute verification plans using emulation and system simulation models to validate design functionality, analyze performance metrics, and uncover bugs.
Debug issues within the pre‑silicon environment, identify root causes, and implement corrective measures effectively.
Collaborate with architects, RTL developers, and design teams to enhance verification of complex SoC features and drive technical reviews of test plans and proofs.
Integrate security activities within test plans to ensure comprehensive security coverage.
Maintain and improve functional verification infrastructure and methodologies.
Analyze insights from post‑silicon validation to update test plans, close coverage gaps, and proliferate learnings to future product developments.
Demonstrate continuous improvement in test suites and methodologies.
Show a passion for innovation and collaboration, contributing to Intel’s mission to push technological boundaries and deliver impactful solutions.
Minimum Qualifications
Bachelor’s degree in Electrical Engineering, Computer Science, or a related field with 8+ years of industry experience
Master’s degree in Electrical Engineering, Computer Science, or a related field with 6+ years of industry experience
PhD in Electrical Engineering, Computer Science, or a related field with 4+ years of industry experience
Proficiency in OVM/UVM methodologies and SystemVerilog‑based constrained‑random verification
Experience in developing and executing verification test plans, including debugging and coverage closure
Proficiency in scripting languages to facilitate automation
Preferred Qualifications
Experience with security or coherency or SoC verification
Extensive experience in design and/or design verification for complex IPs or SoCs
Comprehensive understanding of the verification lifecycle, from architecture to execution and coverage closure
Robust validation and debugging skills, with self‑reliance in resolving issues with internal and external teams
Experience in Xeon CPU pre‑silicon or post‑silicon validation
Expertise in cache coherency principles for multi‑processor SoCs and layered protocols such as transaction layer, data link layer, and PHY layer
Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on‑site at their assigned Intel site and off‑site.*
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Languages
- English
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