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Produce programmable logic requirements from system design requirements and specifications.
Translate programmable logic requirements into Simulink models.
Apply and configure platform library model elements to meet project-specific requirements.
Develop test cases and model test harnesses to verify model fulfillment of requirements.
Generate HDL using HDL Coder and perform co-simulation to verify HDL output against model.
Ensure successful optimization, synthesis, place-and-route and subsequently validate equivalence.
Understand and verify correct tracing from requirements to design artifacts.
Execute end-to-end FPGA development with the rigor required of an ASME NQA-1 quality assurance program (or other industry equivalent).
Perform engineering reviews to identify gaps in the design artifacts and/or their adherence to the planning documents and procedures.
Execute project deliverables within the estimated budgets and in accordance with schedule milestones.
Interface with project management and/or customers in providing status and addressing open issues.
Interface with system designers, hardware engineers, and verification and validation engineers in support of predecessor and successor design lifecycle activities.
Lead or support troubleshooting of complex FPGA design issues.
Qualifications
Bachelor of Science in Electrical or Computer Engineering, or related discipline, advanced degree preferred.
Ten plus years of experience designing and developing design artifacts for FPGAs/ASICs from concept through production and factory testing. Safety critical (or equivalent rigor) experience required.
Extensive experience with requirements-driven design, documentation, debugging, timing, reset strategies, performance testing, corner case analysis and meeting the rigors of safety critical design.
Strong knowledge of industry standard design tools and methodologies.
Strong communication and collaboration skills.
Excellent analytical and debugging skills.
Experience with MathWorks MATLAB, Simulink, StateFlow, and general model-based systems engineering (MBSE) practices.
Experience with Xilinx, Altera and Microsemi technologies and tools design flow.
Well versed in developing constraints and completing timing analysis.
Salary and Other Compensation Annual salary for this position is between $128,000 – $150,000 + bonus depending on experience and other qualifications of the successful candidate. This position is also eligible for Cognizant’s discretionary annual incentive program, based on performance and subject to the terms of Cognizant’s applicable plans.
Benefits
Medical/Dental/Vision/Life Insurance
Paid holidays plus Paid Time Off
401(k) plan and contributions
Long-term/Short-term Disability
Paid Parental Leave
Employee Stock Purchase Plan
Disclaimer: The salary, other compensation, and benefits information is accurate as of the date of this posting. Cognizant reserves the right to modify this information at any time, subject to applicable law.
Cognizant is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
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Languages
- English
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