ASIC Design Verification Engineer

About the Company My client is an innovative startup at the forefront of merging large language models (LLMs) with semiconductor design. The team comprises top-tier professionals in artificial intelligence, software engineering, and semiconductor fabrication. With exceptional founders leading the way and a robust customer foundation, this venture is poised to transform the chip design landscape. Job Overview: We are seeking enthusiastic and skilled Chip Designers or Verification Engineers with extensive experience in FORMAL VERIFICATION tools and VLSI design processes. In this exciting role, you will collaborate with machine learning and software teams to integrate AI technologies into chip design methodologies. This position offers you not only the chance to apply your technical expertise but also to learn from experienced leaders in the machine learning field, contributing directly to impactful customer projects. This role is perfect for chip designers eager to explore beyond conventional boundaries and be part of a groundbreaking approach to semiconductor design. Key Responsibilities: Collaborate with machine learning and software teams to create innovative, AI-enhanced chip design solutions. Engage with clients to understand their requirements and translate them into effective design strategies. Work closely with leading ML experts to apply state-of-the-art technologies in chip design. Directly contribute to customer projects, utilizing your knowledge to deliver practical and creative solutions. Integrate LLM technologies into design processes to enhance effectiveness and performance. Stay abreast of the latest trends in chip design and AI/ML advancements to improve methods and outcomes continually. Qualifications: In-depth knowledge of Formal Verification, Simulation, UVM, and similar methodologies. Ability to write and execute FORMAL verification for designs. Extensive experience in chip design with a solid understanding of design verification. Proficient programming skills (e.g., Python, C/C++, Verilog, SystemVerilog). Experience or interest in AI/ML technologies, particularly LLMs, is a significant plus. Strong analytical and problem-solving skills with a proactive learning approach. Excellent communication skills and the ability to work collaboratively. Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related discipline. Preferred Skills: Proficiency in UVM (Universal Verification Methodology) and other verification techniques. Experience with industry-standard verification tools.