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Bowhead / UIC Technical Services

Field Programmable Gate Array (FPGA) Engineer, Mid

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  • US
    United States
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  • US
    United States

About

Overview Bowhead is seeking a Mid-Level FPGA Engineer to join our team that supports the Hypersonics Projectiles Division of the Naval Surface Warfare Center Dahlgren and contribute to the development of high-performance digital systems. In this role, you will design, implement, and optimize FPGA-based solutions for complex hardware applications. You will work with VHDL, Verilog, and high-level synthesis tools, collaborating with cross-functional teams to ensure efficient and reliable hardware integration. Responsibilities • Design and develop FPGA-based architectures for real-time and high-speed applications. • Implement and optimize VHDL/Verilog code for FPGA designs. • Conduct simulation, synthesis, and timing analysis to ensure performance optimization. • Perform debugging and validation of FPGA designs using industry-standard tools and methodologies. • Collaborate with hardware, software, and systems engineering teams to develop integrated solutions. • Develop and maintain FPGA testbenches for functional verification. • Contribute to system integration, testing, and troubleshooting of FPGA-based hardware. • Document design specifications, implementation details, and test results. Qualifications • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field. • 3-7 years of experience in FPGA design and development. • Proficiency in HDL programming (VHDL, Verilog) and FPGA development tools (Vivado, Quartus, etc.). • Strong understanding of digital logic design, high-speed interfaces, and embedded systems. • Experience with hardware/software co-design and debugging tools (Oscilloscope, JTAG, Signal Analyzer). • Ability to work in a fast-paced environment and manage multiple projects effectively. Preferred Qualifications: • Experience with Xilinx, Altera (Intel FPGA), or Lattice FPGA architectures. • Knowledge of C/C++, Python for FPGA development. • Understanding of high-performance computing, signal processing, and networking applications. • Familiarity with System Verilog, UVM methodology, or high-level synthesis (HLS). Physical Demands: Must be able to lift up to 50 pounds Must be able to stand and walk for prolonged amounts of time Must be able to twist, bend and squat periodically SECURITY CLEARANCE REQUIREMENTS: Must currently hold a security clearance at the Secret level. US Citizenship is a requirement for Secret clearance at this location.

Nice-to-have skills

  • FPGA
  • VHDL
  • Verilog
  • Embedded Systems
  • JTAG
  • Xilinx
  • Altera
  • C
  • C++
  • Python
  • Signal Processing
  • United States

Work experience

  • Embedded
  • Hardware
  • Electronics Engineering

Languages

  • English
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