ASIC/RTL Design Engineer

Job DescriptionJob details are shared below:Job Title: ASIC/RTL Design EngineerLocation: San Jose, CA (onsite 4 days a week)Job Duration: 12+ months Contract with potential for conversionPrimary Skills:5-6+ years' experience designing RTL blocks for an SoCExperience or strong understanding of SystemVerilog, analyzing existing designs, and making modificationsExperience or familiarity with tools used by ASIC engineers like Lint, CDC, STA, etc.Proven track record of ASIC design on multiple production tape-outsExperience in designing RTL blocks for an SoCExperience in integrating ASIC IP into an SoCExperience with synthesis, static timing analysis, and optimizationsNice to have:Experience with scripting languages such as PERL, Python, or TclExperience writing timing constraints and exceptionsExperience with automation using scripting techniquesKnowledge of power-saving techniquesExperience with Arm architecture and protocols like APB, AXI, CHIExperience with interconnect designAbility to develop clear and concise engineering documentationStrong communication skills, both verbal and writtenResponsibilities:Write micro-architecture documentation and own major portions of the design and implementation of blocks to meet requirementsCollaborate with architecture and hardware teams to understand requirementsWork with verification and physical design teams to ensure high-quality design and successful tape-outDesign and implement logic functions for test and debugParticipate in silicon bring-up for owned featuresContribute to solving complex problems across teamsImplement automation to increase team efficiencyQualification:Bachelor's degree in a relevant fieldPlease respond promptly to expedite the interview process. I will contact you if further details are needed.Amit BundeleTechnical RecruiterPhone: 669-###-####Email: ...@saicongroup.comSan Jose, Californiawww.netpolarity.com #J-18808-Ljbffr