Design Engineer, ASIC

+4
+7
California, United States

+4
+7
California, United States

About

Waymo is an autonomous driving technology company with the mission to be the most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver—The World's Most Experienced Driver—to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo One, a fully autonomous ride-hailing service, and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over one million rider-only trips, enabled by its experience autonomously driving tens of millions of miles on public roads and tens of billions in simulation across 13+ U.S. states.Waymo's Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicle's software stack. To achieve our mission, we architect and create high-performance custom silicon; we develop system-level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance. We are a multidisciplinary team seeking curious and talented teammates to work on one of the world's highest performance automotive compute platforms.In this hybrid role, you'll report to an ASIC Design ManagerYou will:Work with researchers and architects to translate high level requirements into hardware featuresSpecify, architect, and design hardware accelerators that process sensor data and other system compute workloadsPerform power, area and performance trade-off analyses of digital designsWork with verification teams to guarantee functional correctness and performanceCreate and run software that tests digital designs in simulation and bringupYou have:BS degree in Computer Engineering or equivalent practical experience5+ years of industry experience with Verilog and SystemVerilog, RTL digital microarchitectureKnowledge of computer architecture and on-chip communication buses (e.g. AXI)Experience with industry standard protocols, interfaces, and IP components, such as PCIe, DDR, MIPI, Ethernet, and NoCsWe prefer:Master's or PhD degree in EngineeringExperience with the full digital design verification cycle -- from spec through bring-upExperience with High Level Synthesis (HLS)Experience with performance and power validation, and formal verificationWorking knowledge of machine learning algorithms & how they map to hardwareFluency in at least one high level programming language such as Python, C++#LI-HybridThe expected base salary range for this full-time position across US locations is listed below. Actual starting pay will be based on job-related factors, including exact work location, experience, relevant training and education, and skill level. Your recruiter can share more about the specific salary range for the role location or, if the role can be performed remote, the specific salary range for your preferred location, during the hiring process.Waymo employees are also eligible to participate in Waymo’s discretionary annual bonus program, equity incentive plan, and generous Company benefits program, subject to eligibility requirements.Salary Range$170,000—$216,000 USD #J-18808-Ljbffr

Nice-to-have skills

C++
Ethernet
HLS
PCIe
Python
SystemVerilog
Verilog

California, United States

Work experience

Embedded
Hardware
Electronics Engineering
Mechatronics Engineer

Languages

English

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