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Sr. ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration - Annapurna LabsAmazon • Cupertino, California, United States
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Sr. ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration - Annapurna Labs

Amazon
  • US
    Cupertino, California, United States
  • US
    Cupertino, California, United States
Apply Now

About

Overview
Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of hardware in our data centers, including AWS Inferentia, our custom-designed machine-learning inference datacenter server. Key Responsibilities
Integrate multiple subsystems into the top-level SOC, ensuring correct clock/reset/functional/DFT signal routing. Implement and deliver high-performance, area- and power-efficient RTL to achieve design targets and specifications. Analyze design, microarchitecture or architecture to make trade-offs based on features, power, performance, or area requirements. Develop micro-architecture, implement SystemVerilog RTL, and deliver synthesis/timing clean design with constraints. Perform lint and clock domain crossing quality checks on the design. Work with architects, other designers, verification teams, pre- and post-silicon validation teams, synthesis, timing, and back-end teams to accomplish tasks. Desired Skills
Familiarity with scripting in Python. Proficiency with assertions. Strong debugging skills to analyze RTL test failures. A "Learn and Be Curious" mindset. Qualifications
Required:
Bachelor's degree in Electrical Engineering or a related field. 5+ years in RTL design for SOC. 5+ years of VLSI engineering. 5+ years with code quality tools including Spyglass, LINT, or CDC. Preferred:
Master’s or Ph.D. in Electrical Engineering or related field. Experience scripting for automation (e.g., Python, Perl, Ruby). Strong analytical skills, attention to detail, and effective communication abilities. Experience with microarchitecture, SystemVerilog RTL, assertions, SDC constraints. Familiarity with data-path design, interconnects, AXI protocol. Benefits
Base salary range: $183,000.00 – $247,600.00 annually (Cupertino, CA) and $159,200.00 – $215,300.00 annually (Austin, TX). Health insurance (medical, dental, vision, prescription), Basic Life & AD&D insurance, Supplemental life plans, EAP, Mental Health Support, Medical Advice Line. Flexible Spending Accounts, 401(k) matching. Paid time off and parental leave. Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.
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  • Cupertino, California, United States

Languages

  • English
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